/DIAG/G
SYSTEM CONFIGURATION GENERATE

CONFIGURATION OF TEST HEAD
NUMBER OF TEST HEAD [1,2] ...........................> 2

CONFIGURATION OF TEST HEAD 1
TEST HEAD TYPE 1.650CH
2.1300CH [1,2] .....................> 1

PIN CONFIGURATION SLOT NO. [33,97,41,105]
CHILD A ....> 33,41,97,105
CHILD B ....> 33,41,97,105
CHILD C ....> 33,41,97,105
CHILD D ....> 33,41,97,105

PIN CONFIGURATION OPTION1 PIN CARD [Y,N]
CHILD A ....> NO
CHILD B ....> NO
CHILD C ....> NO
CHILD D ....> NO

PIN CONFIGURATION OPTION2 PIN CARD [Y,N]
CHILD AB ...> YES
CHILD CD ...> YES

BYPASS CAPACITOR TO 10V/16V PPS (PCON)
1.NON-EXISTENT
2. EXISTENT [1,2] ..............> 1

BYPASS CAPACITOR TO HV PPS (PCON)
1.NON-EXISTENT
2. EXISTENT [1,2] ..............> 1

CONFIGURATION OF TEST HEAD 2
TEST HEAD TYPE 1.650CH
2.1300CH [1,2] .....................> 1

PIN CONFIGURATION SLOT NO. [33,97,41,105]
CHILD A ....> 33,41,97,105
CHILD B ....> 33,41,97,105
CHILD C ....> 33,41,97,105
CHILD D ....> 33,41,97,105

PIN CONFIGURATION OPTION1 PIN CARD [Y,N]
CHILD A ....> NO
CHILD B ....> NO
CHILD C ....> NO
CHILD D ....> NO

PIN CONFIGURATION OPTION2 PIN CARD [Y,N]
CHILD AB ...> YES
CHILD CD ...> YES

BYPASS CAPACITOR TO 10V/16V PPS (PCON)

1.NON-EXISTENT
2. EXISTENT [1,2] ..............> 1

CONFIGURATION OF DPU
1'ST DPU : STN 1,2 [Y,N] ..........................> YES
2'ND DPU : STN 1,2 [Y,N] ..........................> NO

TEST HEAD 1 DC CONFIGURATION [1-16] .............> 1-8
10V PPS CONFIGURATION [1-32] .............> 1-16
HV PPS CONFIGURATION [1-4] .............>

TEST HEAD 2 DC CONFIGURATION [1-16] .............> 1-8
10V PPS CONFIGURATION [1-32] .............> 1-16
HV PPS CONFIGURATION [1-4] .............>

1'ST GPIB I/F BOARD 0.NONE
1.BGR-010944X01
2.BGR-010944X02
3.BGR-010944X03
4.BGR-010944X04
5.BGK-012718 [0-5] .........> 0

2'ND GPIB I/F BOARD 0.NONE
1.BGR-016793 (DPU I/F)
2.BGR-010944X05
3.BGK-012718X02 [0-3] .........> 1

DMM TYPE 1.TR6861
2.R6871E
3.R6551
4.R6552T [1-4] .........> 3

AC FREQUENCY (HERTZ) [50,60] ........................> 60

CONFIGURATION OF TG
OPTION CLOCK : 48 EDGES [Y,N] .......................> YES

CONFIGURATION OF ALPG
SUB PG [Y,N] ....................................> YES

CONFIGURATION OF FM
NUMBER OF FM BOARD [0-8] ...........................> 8
SIZE OF FM BOARD [1-4] (1=72M,2=144M,3=288M,4=576M) ..> 2

PATTERN MEMORY [Y,N] ................................> NO
SUB FM [Y,N] ................................> NO

CONFIGURATION OF MRA
MRA2/3 OPTION [Y,N] ...........................> YES
MRA OPTION TYPE [2,3] (2=MRA2,3=MRA3) ...........> 2
TYPE OF CBU BOARD [1,2] (1: BGR-019267 )
(2: BGR-019267X02) ....> 1
NUMBER OF CBU BOARD [1,2] ...........................> 2
 

TYPE OF FBM BOARD [1-5] (1= 4M*36BIT)
(2= 2M*72BIT)
(3= 4M*72BIT)
(4= 8M*72BIT)
(5=16M*72BIT) .............> 1

NUMBER OF FBM BOARD [1-8] ...........................> 8
COMPRESSION FUNCTION [Y,N] ...........................> NO

(5=16M*72BIT) .............> 1

NUMBER OF FBM BOARD [1-8] ...........................> 8
COMPRESSION FUNCTION [Y,N] ...........................> NO

CONFIGURATION OF VRAM
VRAM3 OPTION [Y,N] ...........................> NO

CONFIGURATION OF FCDC
PIN CPE SEL [Y,N] ...........................> NO

END SAVE